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AS3930
Datasheet - D e t a i l e d D e s c r i p t i o n
Table 7. Description and Default Values
Register
R2<7>
R2<6:5>
R2<4:2>
R2<1:0>
R3<7>
R3<6>
R3<5:3>
R3<2:0>
Name
S_ABSH
W_PAT
Reserved
S_WU1
HY_20m
HY_POS
FS_SCL
FS_ENV
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default Value
0
00
000
00
0
0
100
000
Description
Data slicer threshold reduction
Pattern correlation tolerance (see Table 20)
Reserved
Tolerance setting for the stage wake-up (see Table 14)
Data slicer hysteresis
if HY_20m = 0, then comparator hysteresis = 40mV
if HY_20m = 1, then comparator hysteresis = 20mV
Data slicer hysteresis on both edges (HY_POS=0 → hysteresis on
both edges; HY_POS=1 → hysteresis only on positive edges)
Data slicer time constant (see Table 18)
Envelop detector time constant (see Table 17)
Off time in ON/OFF operation mode
T_OFF=00
1ms
R4<7:6>
T_OFF
R/W
00
T_OFF=01
2ms
T_OFF=10
T_OFF=11
4ms
8ms
2 Byte of wake-up pattern
1 Byte of wake-up pattern
R4<5:4>
R4<3:0>
R5<7:0>
R6<7:0>
R7<7:5>
R7<4:0>
D_RES
GR
TS2
TS1
T_OUT
T_HBIT
R/W
R/W
R/W
R/W
R/W
R/W
01
0000
01101001
10010110
000
01011
Antenna damping resistor (see Table 16)
Gain reduction (see Table 15)
nd
st
Automatic time-out (see Table 21)
Bit rate definition (see Table 19)
Artificial wake-up
T_AUTO=000
T_AUTO=001
T_AUTO=010
No artificial wake-up
1 sec
5 sec
R8<2:0>
T_AUTO
R/W
000
T_AUTO=011
20 sec
T_AUTO=100
T_AUTO=101
T_AUTO=110
T_AUTO=111
2 min
15 min
1 hour
2 hour
R9<6:0>
R10<4:0>
R11<4:0>
R12<4:0>
R13<7:0>
Reserved
RSSI
F_WAK
R
R
R
R
000000
Reserved
RSSI channel
n.a.
n.a.
False wake-up register
www.ams.com/LF-Receiver/AS3930
Revision 1.5
13 - 32
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